Research results of the AGRIPO project, will be presented at IEEE ICECS 2019: K. Karagianni and V. Paliouras, “Versatile Hardware Generation of alpha-Stable Noise for PLC Channel Emulation”, accepted for presentation at IEEE ICECS 2019. The Agripo project designs a digital processor for Smart Grid applications and is supported by greek and european funds through… Read More »
Two VLSILAB papers are to be presented at IEEE NorCAS 2019, October 29-30, Helsinki, Finland: “Hardware Implementation Aspects of a Syndrome-based Neural Network Decoder for BCH Codes” by E. Kavvousanos and V. Paliouras and “Sphere Decoder for Massive MIMO Systems” by D. Vordonis and V. Paliouras.
Our paper entitled “Simplified Hardware Implementation of the Softmax Activation Function” was nominated for the Best Paper Award during MOCAST 2019.
Congratulations to Dr. Ioannis Tsatsaragkos, new PhD in ECE, U. Patras!
Συγχαρητήρια στους έξι αποφοίτους του Διατμηματικού Προγράμματος Μεταπτυχιακών Σπουδών ΟΣΥΛ, οι οποίοι ορκίστηκαν σήμερα!
Tuesday 29/1 @ 17:00 room HL1: We welcome Dr. S. Koutroubinas and for a talk on MEAZON activities and future directions.
Wednesday 19 December 2018, 18:00, General Assembly room: Ioannis Tsatsaragkos will present his PhD thesis on “VLSI architectures for error correction in digital communication systems.”
On Thursday October 11, 2018 at 11:00, Kleanthis Papachatzopoulos will defend his master thesis on “Data representation and adder architectures in the presence of variations.” Location: VLSILAB.
Two VLSILAB papers on hardware for deep learning will be presented at IEEE ICECS 2018, Bordeaux, France, December 9-12, 2018.
Delighted to welcome Prof. Francky Catthoor, IMEC, KUL, for a fruitful and thought-provoking meeting, today @VLSILAB.