Contact Vassilis Paliouras for 2023 diploma theses projects in the following areas (yet, not limited to):
Vasilis Sakellariou, Vassilis Paliouras, Ioannis Kouretas, Hani Saleh, Thanos Stouraitis, “A multiplier-free RNS-based CNN accelerator exploiting bitlevel sparsity,” in IEEE Transactions on Emerging Topics in Computing, Special Section on Computer Arithmetic, 2023, doi:10.1109/TETC.2023.3301590.
K. Papachatzopoulos and V. Paliouras, “Noise-Shaping Binary-to-Stochastic Converters for Reduced-Length Bit-Streams,” in IEEE Transactions on Emerging Topics in Computing, 2023, doi: 10.1109/TETC.2023.3299516, early access
Research results of the AGRIPO project, will be presented at IEEE ICECS 2019: K. Karagianni and V. Paliouras, “Versatile Hardware Generation of alpha-Stable Noise for PLC Channel Emulation”, accepted for presentation at IEEE ICECS 2019. The Agripo project designs a digital processor for Smart Grid applications and is supported by greek and european funds through… Read More »
Two VLSILAB papers are to be presented at IEEE NorCAS 2019, October 29-30, Helsinki, Finland: “Hardware Implementation Aspects of a Syndrome-based Neural Network Decoder for BCH Codes” by E. Kavvousanos and V. Paliouras and “Sphere Decoder for Massive MIMO Systems” by D. Vordonis and V. Paliouras.
Συγχαρητήρια στους έξι αποφοίτους του Διατμηματικού Προγράμματος Μεταπτυχιακών Σπουδών ΟΣΥΛ, οι οποίοι ορκίστηκαν σήμερα!
Wednesday 19 December 2018, 18:00, General Assembly room: Ioannis Tsatsaragkos will present his PhD thesis on “VLSI architectures for error correction in digital communication systems.”
Delighted to welcome Prof. Francky Catthoor, IMEC, KUL, for a fruitful and thought-provoking meeting, today @VLSILAB.